commit 4b977312c7a9c078211de83771b40a1561deb047
author Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Dec 19 07:50:20 2012 +0000
committer Elena Demikhovsky <elena.demikhovsky@intel.com> Wed Dec 19 07:50:20 2012 +0000
tree 41467ecd7c292f7b91bd820723a4d946375a6f3b
parent bf5a2c6a39f2a98a83f5fb668b8b35156b693471

Optimized load + SIGN_EXTEND patterns in the X86 backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170506 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7c54d17..527fdaa 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5235,6 +5235,7 @@
                                      LN0->getAlignment());
     CombineTo(N, ExtLoad);
     CombineTo(N0.getNode(), ExtLoad, ExtLoad.getValue(1));
+    AddToWorkList(ExtLoad.getNode());
     return SDValue(N, 0);   // Return N so it doesn't get rechecked!
   }
   // fold (sext_inreg (zextload x)) -> (sextload x) iff load has one use