Change interface of MachineOperand as follows:
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
index 73e5480..a58aed9 100644
--- a/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
@@ -178,8 +178,8 @@
// Bit-selection flags indicate an instruction that is extracting
// bits from its operand so ignore this even if it is a big constant.
- if (mop.opHiBits32() || mop.opLoBits32() ||
- mop.opHiBits64() || mop.opLoBits64())
+ if (mop.isHiBits32() || mop.isLoBits32() ||
+ mop.isHiBits64() || mop.isLoBits64())
continue;
opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,