commit | 4dc8bdf87d402ad8c91d9a72777d9576c5461e40 | [log] [tgz] |
---|---|---|
author | Benjamin Kramer <benny.kra@googlemail.com> | Sun May 19 22:01:57 2013 +0000 |
committer | Benjamin Kramer <benny.kra@googlemail.com> | Sun May 19 22:01:57 2013 +0000 |
tree | ff0feeb8f45c8841369242dda8544c005fdd9360 | |
parent | 634123e98de9c87aa1275a5ccc6b69be97d0ca71 [diff] [blame] |
Replace some bit operations with simpler ones. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182226 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index d289637..c562cf7 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1224,7 +1224,7 @@ } // Empty register lists are not allowed. - if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail; + if (Val == 0) return MCDisassembler::Fail; for (unsigned i = 0; i < 16; ++i) { if (Val & (1 << i)) { if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))