Added the llvm.readport and llvm.writeport intrinsics for x86. These do
I/O port instructions on x86. The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output. This required adjustment to some
methods so that a leading comma would or would not be printed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12782 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index d44e0c6..1ddaaab 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -82,10 +82,20 @@
ImmType ImmT = i;
bits<2> ImmTypeBits = ImmT.Value;
+ //
// Attributes specific to X86 instructions...
+ //
bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix?
- bit printImplicitUsesBefore = 0; // Should we print implicit uses before this inst?
- bit printImplicitUsesAfter = 0; // Should we print implicit uses after this inst?
+
+ // Flag whether implicit register usage is printed before/after the
+ // instruction
+ bit printImplicitUsesBefore = 0;
+ bit printImplicitUsesAfter = 0;
+
+ // Flag whether implicit register definitions are printed before/after the
+ // instruction
+ bit printImplicitDefsBefore = 0;
+ bit printImplicitDefsAfter = 0;
bits<4> Prefix = 0; // Which prefix byte does this inst have?
FPFormat FPForm; // What flavor of FP instruction is this?
@@ -141,6 +151,8 @@
// Helper for shift instructions
class UsesCL { list<Register> Uses = [CL]; bit printImplicitUsesAfter = 1; }
+class PrintImpUsesAfter {bit printImplicitUsesAfter = 1;}
+class PrintImpDefsAfter {bit printImplicitDefsAfter = 1;}
//===----------------------------------------------------------------------===//
// Instruction list...
@@ -234,6 +246,17 @@
Imp<[EAX,ECX,EDI], [ECX,EDI]>;
//===----------------------------------------------------------------------===//
+// Input/Output Instructions...
+//
+def IN8 : I<"in", 0xEC, RawFrm>, Imp<[DX],[AL]>, PrintImpUsesAfter, PrintImpDefsAfter; // in AL = I/O address DX
+def IN16 : I<"in", 0xED, RawFrm>, Imp<[DX],[AX]>, PrintImpUsesAfter, PrintImpDefsAfter; // in AX = I/O address DX
+def IN32 : I<"in", 0xED, RawFrm>, Imp<[DX],[EAX]>, PrintImpUsesAfter, PrintImpDefsAfter; // in EAX = I/O address DX
+
+def OUT8 : I<"out", 0xEE, RawFrm>, Imp<[DX, AL], []>, PrintImpUsesAfter;
+def OUT16 : I<"out", 0xEF, RawFrm>, Imp<[DX, AX], []>, PrintImpUsesAfter;
+def OUT32 : I<"out", 0xEF, RawFrm>, Imp<[DX, EAX], []>, PrintImpUsesAfter;
+
+//===----------------------------------------------------------------------===//
// Move Instructions...
//
def MOV8rr : I <"mov", 0x88, MRMDestReg>, Pattern<(set R8 , R8 )>;