commit 50871247216dfef8386a112766e972a1792b0b56
author Evan Cheng <evan.cheng@apple.com> Wed May 14 20:07:51 2008 +0000
committer Evan Cheng <evan.cheng@apple.com> Wed May 14 20:07:51 2008 +0000
tree e67dba19a43674dd4d6c8d579a3c99cc5e439d61
parent ef3682a4fbfc3ff1a593adf95740ad8ab0d1d487

Silence some compiler warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index b4958d6..5acb6fa 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -407,6 +407,7 @@
     if (InstanceNo > 0)
       VRBaseMap.erase(SDOperand(Node, ResNo));
     bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
+    isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
     return;
   }
@@ -465,6 +466,7 @@
   if (InstanceNo > 0)
     VRBaseMap.erase(SDOperand(Node, ResNo));
   bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
+  isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
 
@@ -522,6 +524,7 @@
     }
 
     bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase));
+    isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
   }
 }
@@ -719,9 +722,11 @@
 
     if (VRBase) {
       // Grab the destination register
+#ifndef NDEBUG
       const TargetRegisterClass *DRC = MRI.getRegClass(VRBase);
       assert(SRC && DRC && SRC == DRC && 
              "Source subregister and destination must have the same class");
+#endif
     } else {
       // Create the reg
       assert(SRC && "Couldn't find source register class");
@@ -772,6 +777,7 @@
     assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
      
   bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase));
+  isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
 
@@ -799,10 +805,10 @@
     unsigned NumResults = CountResults(Node);
     unsigned NodeOperands = CountOperands(Node);
     unsigned MemOperandsEnd = ComputeMemOperandsEnd(Node);
-    unsigned NumMIOperands = NodeOperands + NumResults;
     bool HasPhysRegOuts = (NumResults > II.getNumDefs()) &&
                           II.getImplicitDefs() != 0;
 #ifndef NDEBUG
+    unsigned NumMIOperands = NodeOperands + NumResults;
     assert((II.getNumOperands() == NumMIOperands ||
             HasPhysRegOuts || II.isVariadic()) &&
            "#operands for dag node doesn't match .td file!"); 
@@ -999,6 +1005,7 @@
       assert(I->Reg && "Unknown physical register!");
       unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
       bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase));
+      isNew; // Silence compiler warning.
       assert(isNew && "Node emitted out of order - early");
       TII->copyRegToReg(*BB, BB->end(), VRBase, I->Reg,
                         SU->CopyDstRC, SU->CopySrcRC);