commit 50d456539dea5e61d7a1592a78f1861fb35b0063
author Chris Lattner <sabre@nondot.org> Tue Feb 27 22:08:27 2007 +0000
committer Chris Lattner <sabre@nondot.org> Tue Feb 27 22:08:27 2007 +0000
tree a33fb512db75c5024c60c0ca5917674e9cd2745b
parent 88ee2a18a77438e3f26efc87bded672db041fe09

reapply


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34697 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/TableGen.cpp

diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 4345234..d3d241e 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -20,6 +20,7 @@
 #include "llvm/Support/Streams.h"
 #include "llvm/System/Signals.h"
 #include "llvm/Support/FileUtilities.h"
+#include "CallingConvEmitter.h"
 #include "CodeEmitterGen.h"
 #include "RegisterInfoEmitter.h"
 #include "InstrInfoEmitter.h"
@@ -38,6 +39,7 @@
   GenEmitter,
   GenRegisterEnums, GenRegister, GenRegisterHeader,
   GenInstrEnums, GenInstrs, GenAsmWriter, 
+  GenCallingConv,
   GenDAGISel,
   GenSubtarget,
   GenIntrinsic,
@@ -61,6 +63,8 @@
                                "Generate enum values for instructions"),
                     clEnumValN(GenInstrs, "gen-instr-desc",
                                "Generate instruction descriptions"),
+                    clEnumValN(GenCallingConv, "gen-callingconv",
+                               "Generate calling convention descriptions"),
                     clEnumValN(GenAsmWriter, "gen-asm-writer",
                                "Generate assembly writer"),
                     clEnumValN(GenDAGISel, "gen-dag-isel",
@@ -138,7 +142,9 @@
     case GenInstrs:
       InstrInfoEmitter(Records).run(*Out);
       break;
-
+    case GenCallingConv:
+      CallingConvEmitter(Records).run(*Out);
+      break;
     case GenAsmWriter:
       AsmWriterEmitter(Records).run(*Out);
       break;