Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/AggressiveAntiDepBreaker.cpp b/lib/CodeGen/AggressiveAntiDepBreaker.cpp
index c10900c..17b50bd 100644
--- a/lib/CodeGen/AggressiveAntiDepBreaker.cpp
+++ b/lib/CodeGen/AggressiveAntiDepBreaker.cpp
@@ -99,12 +99,24 @@
AggressiveAntiDepBreaker::
-AggressiveAntiDepBreaker(MachineFunction& MFi) :
+AggressiveAntiDepBreaker(MachineFunction& MFi,
+ TargetSubtarget::ExcludedRCVector& ExcludedRCs) :
AntiDepBreaker(), MF(MFi),
MRI(MF.getRegInfo()),
TRI(MF.getTarget().getRegisterInfo()),
AllocatableSet(TRI->getAllocatableSet(MF)),
State(NULL), SavedState(NULL) {
+ /* Remove all registers from excluded RCs from the allocatable
+ register set. */
+ for (unsigned i = 0, e = ExcludedRCs.size(); i < e; ++i) {
+ BitVector NotRenameable = TRI->getAllocatableSet(MF, ExcludedRCs[i]).flip();
+ AllocatableSet &= NotRenameable;
+ }
+
+ DEBUG(errs() << "AntiDep Renameable Registers:");
+ DEBUG(for (int r = AllocatableSet.find_first(); r != -1;
+ r = AllocatableSet.find_next(r))
+ errs() << " " << TRI->getName(r));
}
AggressiveAntiDepBreaker::~AggressiveAntiDepBreaker() {