commit 527db3f26b2b5fc3855ff671344e9691cbd54d37
author David Majnemer <david.majnemer@gmail.com> Tue Apr 30 10:36:33 2013 +0000
committer David Majnemer <david.majnemer@gmail.com> Tue Apr 30 10:36:33 2013 +0000
tree 0c7760e0f72ca984ce9bdf21ce2b0cf668229d77
parent 62d77858be88ca011b55f5b350152bf04d1ca7db

Fix a bug in foldSelectICmpAndOr.

Differences in bitwidth between X and Y could exist even if C1 and C2 have
the same Log2 representation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180779 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/InstCombine/InstCombineSelect.cpp

diff --git a/lib/Transforms/InstCombine/InstCombineSelect.cpp b/lib/Transforms/InstCombine/InstCombineSelect.cpp
index a34b73a..2defe63 100644
--- a/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -401,7 +401,8 @@
   } else if (C1Log > C2Log) {
     V = Builder->CreateLShr(V, C1Log - C2Log);
     V = Builder->CreateZExtOrTrunc(V, Y->getType());
-  }
+  } else
+    V = Builder->CreateZExtOrTrunc(V, Y->getType());
 
   ICmpInst::Predicate Pred = IC->getPredicate();
   if ((Pred == ICmpInst::ICMP_NE && OrOnFalseVal) ||