5480c0469e5c0323ffb12f1ead2abd169d6cc0e7 - platform/external/llvm

commit	5480c0469e5c0323ffb12f1ead2abd169d6cc0e7	[log] [tgz]
author	Duncan Sands <baldrick@free.fr>	Thu Jan 01 15:52:00 2009 +0000
committer	Duncan Sands <baldrick@free.fr>	Thu Jan 01 15:52:00 2009 +0000
tree	1898f427b35c6795171701138e08762cd3aff3c1
parent	8fb520eb4f06d4ef771abe9c22d85b2a275988ee [diff]

Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Target/TargetLowering.h[diff]
lib/CodeGen/SelectionDAG/DAGCombiner.cpp[diff]
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp[diff]
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp[diff]
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp[diff]
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp[diff]
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp[diff]
lib/CodeGen/SelectionDAG/TargetLowering.cpp[diff]
lib/Target/Alpha/AlphaISelLowering.cpp[diff]
lib/Target/Alpha/AlphaISelLowering.h[diff]
lib/Target/CellSPU/SPUISelLowering.cpp[diff]
lib/Target/CellSPU/SPUISelLowering.h[diff]
lib/Target/IA64/IA64ISelLowering.cpp[diff]
lib/Target/IA64/IA64ISelLowering.h[diff]
lib/Target/Mips/MipsISelLowering.cpp[diff]
lib/Target/Mips/MipsISelLowering.h[diff]
lib/Target/PowerPC/PPCISelLowering.cpp[diff]
lib/Target/PowerPC/PPCISelLowering.h[diff]
lib/Target/X86/X86ISelLowering.cpp[diff]
lib/Target/X86/X86ISelLowering.h[diff]
test/CodeGen/CellSPU/2009-01-01-BrCond.ll[Added - diff]

21 files changed

tree: 1898f427b35c6795171701138e08762cd3aff3c1