commit 5ff62e90d0bc321206023897edc1e2691cb0fbb6
author Chris Lattner <sabre@nondot.org> Mon Jul 22 02:10:13 2002 +0000
committer Chris Lattner <sabre@nondot.org> Mon Jul 22 02:10:13 2002 +0000
tree f9dd91f41ef5858a217a9b871d0e3d8fe089da99
parent 50e3f88d38d93edcec9047322da8ed43aefc9e3d

*** empty log message ***


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2985 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/InstrSched/InstrScheduling.cpp

diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp
index 6ea3724..1d4c180 100644
--- a/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -21,13 +21,16 @@
 
 SchedDebugLevel_t SchedDebugLevel;
 
-static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
-  "enable instruction scheduling debugging information",
-  clEnumValN(Sched_NoDebugInfo,      "n", "disable debug output"),
-  clEnumValN(Sched_Disable,        "off", "disable instruction scheduling"),
-  clEnumValN(Sched_PrintMachineCode, "y", "print machine code after scheduling"),
-  clEnumValN(Sched_PrintSchedTrace,  "t", "print trace of scheduling actions"),
-  clEnumValN(Sched_PrintSchedGraphs, "g", "print scheduling graphs"), 0);
+static cl::opt<SchedDebugLevel_t, true>
+SDL_opt("dsched", cl::Hidden, cl::location(SchedDebugLevel),
+        cl::desc("enable instruction scheduling debugging information"),
+        cl::values(
+ clEnumValN(Sched_NoDebugInfo,      "n", "disable debug output"),
+ clEnumValN(Sched_Disable,        "off", "disable instruction scheduling"),
+ clEnumValN(Sched_PrintMachineCode, "y", "print machine code after scheduling"),
+ clEnumValN(Sched_PrintSchedTrace,  "t", "print trace of scheduling actions"),
+ clEnumValN(Sched_PrintSchedGraphs, "g", "print scheduling graphs"),
+                   0));
 
 
 //************************* Internal Data Types *****************************/

lib/CodeGen/InstrSelection/InstrSelection.cpp

diff --git a/lib/CodeGen/InstrSelection/InstrSelection.cpp b/lib/CodeGen/InstrSelection/InstrSelection.cpp
index d61feb4..86e54d0 100644
--- a/lib/CodeGen/InstrSelection/InstrSelection.cpp
+++ b/lib/CodeGen/InstrSelection/InstrSelection.cpp
@@ -26,7 +26,6 @@
 #include "llvm/Function.h"
 #include "llvm/iPHINode.h"
 #include "Support/CommandLine.h"
-#include <iostream>
 using std::cerr;
 using std::vector;
 
@@ -40,13 +39,18 @@
   Select_DebugBurgTrees,
 };
 
+
 // Enable Debug Options to be specified on the command line
-cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::Hidden,
-   "enable instruction selection debugging information",
+static cl::opt<SelectDebugLevel_t>
+SelectDebugLevel("dselect", cl::Hidden,
+                 cl::desc("enable instruction selection debugging information"),
+                 cl::values(
    clEnumValN(Select_NoDebugInfo,      "n", "disable debug output"),
    clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"),
-   clEnumValN(Select_DebugInstTrees,   "i", "print debugging info for instruction selection "),
-   clEnumValN(Select_DebugBurgTrees,   "b", "print burg trees"), 0);
+   clEnumValN(Select_DebugInstTrees,   "i",
+              "print debugging info for instruction selection"),
+   clEnumValN(Select_DebugBurgTrees,   "b", "print burg trees"),
+                            0));
 
 
 //******************** Forward Function Declarations ***********************/

lib/CodeGen/RegAlloc/PhyRegAlloc.cpp

diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index ef41561..a192310 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -19,25 +19,25 @@
 #include "llvm/Analysis/LoopInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineFrameInfo.h"
-#include "llvm/BasicBlock.h"
 #include "llvm/Function.h"
 #include "llvm/Type.h"
 #include "llvm/iOther.h"
 #include "llvm/CodeGen/RegAllocCommon.h"
 #include "Support/CommandLine.h"
 #include "Support/STLExtras.h"
-#include <iostream>
 #include <math.h>
 using std::cerr;
 using std::vector;
 
 RegAllocDebugLevel_t DEBUG_RA;
-static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
-                                                 cl::Hidden,
-  "enable register allocation debugging information",
+static cl::opt<RegAllocDebugLevel_t, true>
+DRA_opt("dregalloc", cl::Hidden, cl::location(DEBUG_RA),
+        cl::desc("enable register allocation debugging information"),
+        cl::values(
   clEnumValN(RA_DEBUG_None   , "n", "disable debug output"),
   clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),
-  clEnumValN(RA_DEBUG_Verbose, "v", "enable extra debug output"), 0);
+  clEnumValN(RA_DEBUG_Verbose, "v", "enable extra debug output"),
+                   0));
 
 
 //----------------------------------------------------------------------------