add some random notes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131862 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index c96741a..98a3654 100644
--- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -40,6 +40,11 @@
     return IC.Builder->CreateShl(One, A);
   }
   
+  // TODO: Lots more we could do here:
+  //    "1 >> X" could get an "isexact" bit.
+  //    If V is a phi node, we can call this on each of its operands.
+  //    "select cond, X, 0" can simplify to "X".
+  
   return 0;
 }