ARM fix typo in pre-indexed store lowering.
rdar://9915869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137148 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index b72467f..8e326cf 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -5291,7 +5291,7 @@
}
case ARM::STRi_preidx:
case ARM::STRBi_preidx: {
- unsigned NewOpc = MI->getOpcode() == ARM::STRr_preidx ?
+ unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ?
ARM::STR_PRE_IMM : ARM::STRB_PRE_IMM;
// Decode the offset.
unsigned Offset = MI->getOperand(4).getImm();