Fix the check for nested IT instructions in the disassembler. We need to perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141339 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 36aa6b1..5f6fc29 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -724,15 +724,18 @@
result = decodeThumb2Instruction16(MI, insn16, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 2;
+
+ // Nested IT blocks are UNPREDICTABLE. Must be checked before we add
+ // the Thumb predicate.
+ if (MI.getOpcode() == ARM::t2IT && !ITBlock.empty())
+ result = MCDisassembler::SoftFail;
+
Check(result, AddThumbPredicate(MI));
// If we find an IT instruction, we need to parse its condition
// code and mask operands so that we can apply them correctly
// to the subsequent instructions.
if (MI.getOpcode() == ARM::t2IT) {
- // Nested IT blocks are UNPREDICTABLE.
- if (!ITBlock.empty())
- return MCDisassembler::SoftFail;
// (3 - the number of trailing zeros) is the number of then / else.
unsigned firstcond = MI.getOperand(0).getImm();