commit 7111b02c734c992b8c97d9918118768026dad79e
author Dale Johannesen <dalej@apple.com> Thu Oct 09 18:53:47 2008 +0000
committer Dale Johannesen <dalej@apple.com> Thu Oct 09 18:53:47 2008 +0000
tree c6a444a3819e1ae62e870dd0040a8cd4f699d778
parent a6bf66d0d6c1ed9bb657f72bc89c432c4ee96f63

Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does.  No functional
change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 8874eb8..b7311b7 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -445,7 +445,7 @@
   if (!UseCP) {
     if (VT!=MVT::f64 && VT!=MVT::f32)
       assert(0 && "Invalid type expansion");
-    return DAG.getConstant(LLVMC->getValueAPF().convertToAPInt(),
+    return DAG.getConstant(LLVMC->getValueAPF().bitcastToAPInt(),
                            (VT == MVT::f64) ? MVT::i64 : MVT::i32);
   }
 
@@ -2357,7 +2357,7 @@
         if (CFP->getValueType(0) == MVT::f32 && 
             getTypeAction(MVT::i32) == Legal) {
           Tmp3 = DAG.getConstant(CFP->getValueAPF().
-                                          convertToAPInt().zextOrTrunc(32),
+                                          bitcastToAPInt().zextOrTrunc(32),
                                   MVT::i32);
           Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
                                 SVOffset, isVolatile, Alignment);
@@ -2365,7 +2365,7 @@
         } else if (CFP->getValueType(0) == MVT::f64) {
           // If this target supports 64-bit registers, do a single 64-bit store.
           if (getTypeAction(MVT::i64) == Legal) {
-            Tmp3 = DAG.getConstant(CFP->getValueAPF().convertToAPInt().
+            Tmp3 = DAG.getConstant(CFP->getValueAPF().bitcastToAPInt().
                                      zextOrTrunc(64), MVT::i64);
             Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
                                   SVOffset, isVolatile, Alignment);
@@ -2374,7 +2374,7 @@
             // Otherwise, if the target supports 32-bit registers, use 2 32-bit
             // stores.  If the target supports neither 32- nor 64-bits, this
             // xform is certainly not worth it.
-            const APInt &IntVal =CFP->getValueAPF().convertToAPInt();
+            const APInt &IntVal =CFP->getValueAPF().bitcastToAPInt();
             SDValue Lo = DAG.getConstant(APInt(IntVal).trunc(32), MVT::i32);
             SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), MVT::i32);
             if (TLI.isBigEndian()) std::swap(Lo, Hi);
@@ -5912,7 +5912,7 @@
   case ISD::ConstantFP: {
     ConstantFPSDNode *CFP = cast<ConstantFPSDNode>(Node);
     if (CFP->getValueType(0) == MVT::ppcf128) {
-      APInt api = CFP->getValueAPF().convertToAPInt();
+      APInt api = CFP->getValueAPF().bitcastToAPInt();
       Lo = DAG.getConstantFP(APFloat(APInt(64, 1, &api.getRawData()[1])),
                              MVT::f64);
       Hi = DAG.getConstantFP(APFloat(APInt(64, 1, &api.getRawData()[0])),