rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 3167fcc..dec401c 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -93,11 +93,11 @@
mbbi != mbbe; ++mbbi) {
for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
mi != me; ++mi) {
- const TargetInstrDescriptor *TID = mi->getDesc();
+ const TargetInstrDesc &TID = mi->getDesc();
bool FirstTied = true;
- for (unsigned si = 1, e = TID->getNumOperands(); si < e; ++si) {
- int ti = TID->getOperandConstraint(si, TOI::TIED_TO);
+ for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
+ int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
if (ti == -1)
continue;
@@ -144,7 +144,7 @@
// so, swap the B and C operands. This makes the live ranges of A
// and C joinable.
// FIXME: This code also works for A := B op C instructions.
- if (TID->isCommutable() && mi->getNumOperands() >= 3) {
+ if (TID.isCommutable() && mi->getNumOperands() >= 3) {
assert(mi->getOperand(3-si).isRegister() &&
"Not a proper commutative instruction!");
unsigned regC = mi->getOperand(3-si).getReg();
@@ -172,12 +172,12 @@
// If this instruction is potentially convertible to a true
// three-address instruction,
- if (TID->isConvertibleTo3Addr()) {
+ if (TID.isConvertibleTo3Addr()) {
// FIXME: This assumes there are no more operands which are tied
// to another register.
#ifndef NDEBUG
- for (unsigned i = si+1, e = TID->getNumOperands(); i < e; ++i)
- assert(TID->getOperandConstraint(i, TOI::TIED_TO) == -1);
+ for (unsigned i = si+1, e = TID.getNumOperands(); i < e; ++i)
+ assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
#endif
if (MachineInstr *New = TII.convertToThreeAddress(mbbi, mi, LV)) {