STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 40a7936..a57102c 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -927,6 +927,8 @@
case ARM::STC2L_OPTION:
case ARM::LDCL_POST:
case ARM::STCL_POST:
+ case ARM::LDC2L_POST:
+ case ARM::STC2L_POST:
break;
default:
Inst.addOperand(MCOperand::CreateReg(0));
@@ -946,6 +948,8 @@
switch (Inst.getOpcode()) {
case ARM::LDCL_POST:
case ARM::STCL_POST:
+ case ARM::LDC2L_POST:
+ case ARM::STC2L_POST:
imm |= U << 8;
case ARM::LDC_OPTION:
case ARM::LDCL_OPTION: