Fix 'ret long' to return the high and lo parts in the right registers. This
fixes crafty and probably others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23167 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 69a33eb..9eef4fb 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1569,7 +1569,7 @@
case ISD::RET: {
SDOperand Chain = Select(N->getOperand(0)); // Token chain.
- if (N->getNumOperands() > 1) {
+ if (N->getNumOperands() == 2) {
SDOperand Val = Select(N->getOperand(1));
if (N->getOperand(1).getValueType() == MVT::i32) {
Chain = CurDAG->getCopyToReg(Chain, PPC::R3, Val);
@@ -1577,14 +1577,12 @@
assert(MVT::isFloatingPoint(N->getOperand(1).getValueType()));
Chain = CurDAG->getCopyToReg(Chain, PPC::F1, Val);
}
-
- if (N->getNumOperands() > 2) {
- assert(N->getOperand(1).getValueType() == MVT::i32 &&
- N->getOperand(2).getValueType() == MVT::i32 &&
- N->getNumOperands() == 3 && "Unknown two-register ret value!");
- Val = Select(N->getOperand(2));
- Chain = CurDAG->getCopyToReg(Chain, PPC::R4, Val);
- }
+ } else if (N->getNumOperands() > 1) {
+ assert(N->getOperand(1).getValueType() == MVT::i32 &&
+ N->getOperand(2).getValueType() == MVT::i32 &&
+ N->getNumOperands() == 3 && "Unknown two-register ret value!");
+ Chain = CurDAG->getCopyToReg(Chain, PPC::R4, Select(N->getOperand(1)));
+ Chain = CurDAG->getCopyToReg(Chain, PPC::R3, Select(N->getOperand(2)));
}
// Finally, select this to a blr (return) instruction.