commit 8019f41c0b7fda031d494e3900eada7d4e494772
author Chris Lattner <sabre@nondot.org> Sun Dec 30 00:41:17 2007 +0000
committer Chris Lattner <sabre@nondot.org> Sun Dec 30 00:41:17 2007 +0000
tree 377636e4ef504b1ade5c0644d64f650ed75a991f
parent c8313f1d7957843d6032170573716cf8e6aeb93c

Start using the simplified methods for adding operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45432 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/LiveVariables.cpp

diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index 6b722fa..ca3a0512 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -218,7 +218,8 @@
   // If not found, this means an alias of one of the operand is killed. Add a
   // new implicit operand if required.
   if (!Found && AddIfNotFound) {
-    MI->addRegOperand(IncomingReg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
+    MI->addOperand(MachineOperand::CreateReg(IncomingReg, false/*IsDef*/,
+                                             true/*IsImp*/,true/*IsKill*/));
     return true;
   }
   return Found;
@@ -250,8 +251,9 @@
   // If not found, this means an alias of one of the operand is dead. Add a
   // new implicit operand.
   if (!Found && AddIfNotFound) {
-    MI->addRegOperand(IncomingReg, true/*IsDef*/,true/*IsImp*/,false/*IsKill*/,
-                      true/*IsDead*/);
+    MI->addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/,
+                                             true/*IsImp*/,false/*IsKill*/,
+                                             true/*IsDead*/));
     return true;
   }
   return Found;
@@ -263,8 +265,9 @@
     MachineInstr *Def = PhysRegPartDef[Reg][i];
     // First one is just a def. This means the use is reading some undef bits.
     if (i != 0)
-      Def->addRegOperand(Reg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
-    Def->addRegOperand(Reg, true/*IsDef*/,true/*IsImp*/);
+      Def->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
+                                                true/*IsImp*/,true/*IsKill*/));
+    Def->addOperand(MachineOperand::CreateReg(Reg,true/*IsDef*/,true/*IsImp*/));
   }
   PhysRegPartDef[Reg].clear();
 
@@ -276,7 +279,8 @@
       !PhysRegUsed[Reg]) {
     MachineInstr *Def = PhysRegInfo[Reg];
     if (!Def->findRegisterDefOperand(Reg))
-      Def->addRegOperand(Reg, true/*IsDef*/,true/*IsImp*/);
+      Def->addOperand(MachineOperand::CreateReg(Reg, true/*IsDef*/,
+                                                true/*IsImp*/));
   }
 
   // There is a now a proper use, forget about the last partial use.
@@ -397,8 +401,10 @@
         // being re-defined. Treat it as read/mod/write.
         // EAX =
         // AX  =        EAX<imp-use,kill>, EAX<imp-def>
-        MI->addRegOperand(SuperReg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
-        MI->addRegOperand(SuperReg, true/*IsDef*/,true/*IsImp*/);
+        MI->addOperand(MachineOperand::CreateReg(SuperReg, false/*IsDef*/,
+                                                 true/*IsImp*/,true/*IsKill*/));
+        MI->addOperand(MachineOperand::CreateReg(SuperReg, true/*IsDef*/,
+                                                 true/*IsImp*/));
         PhysRegInfo[SuperReg] = MI;
         PhysRegUsed[SuperReg] = false;
         PhysRegPartUse[SuperReg] = NULL;
@@ -538,7 +544,7 @@
         HandlePhysRegUse(*I, Ret);
         // Add live-out registers as implicit uses.
         if (Ret->findRegisterUseOperandIdx(*I) == -1)
-          Ret->addRegOperand(*I, false, true);
+          Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
       }
     }