Added support for correct spilling of %ccr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1112 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index 633b621..b417565 100644
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -22,7 +22,7 @@
 			  Meth(M), TM(tm), LVI(Lvi), LRI(M, tm, RegClassList), 
 			  MRI( tm.getRegInfo() ),
                           NumOfRegClasses(MRI.getNumOfRegClasses()),
-			  AddedInstrMap(), StackOffsets(), PhiInstList()
+			  AddedInstrMap(), StackOffsets() /*, PhiInstList()*/
 
 {
   // **TODO: use an actual reserved color list 
@@ -268,11 +268,11 @@
 	    addInterference( MInst->getImplicitRef(z), LVSetAI, isCallInst );
       }
 
-
+      /*
       // record phi instrns in PhiInstList
       if( TM.getInstrInfo().isDummyPhiInstr(MInst->getOpCode()) )
 	PhiInstList.push_back( MInst );
-
+      */
 
     } // for all machine instructions in BB
     
@@ -680,6 +680,8 @@
 
 }
 
+#endif
+
 
 //----------------------------------------------------------------------------
 // We can use the following method to get a temporary register to be used
@@ -687,9 +689,10 @@
 // this method will simply return that register and set MIBef = MIAft = NULL.
 // Otherwise, it will return a register and MIAft and MIBef will contain
 // two instructions used to free up this returned register.
+// Returned register number is the UNIFIED register number
 //----------------------------------------------------------------------------
 
-int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC, 
+int PhyRegAlloc::getUsableRegAtMI(RegClass *RC, 
 				  const int RegType,
 				  const MachineInstr *MInst, 
 				  const LiveVarSet *LVSetBef,
@@ -697,18 +700,21 @@
 				  MachineInstr *MIAft) {
 
   int Reg =  getUnusedRegAtMI(RC, MInst, LVSetBef);
+  Reg = MRI.getUnifiedRegNum(RC->getID(), Reg);
 
   if( Reg != -1) {
     // we found an unused register, so we can simply used
     MIBef = MIAft = NULL;
   }
   else {
-    // we couldn't find an unused register. Generate code to ree up a reg by
+    // we couldn't find an unused register. Generate code to free up a reg by
     // saving it on stack and restoring after the instruction
 
+    int TmpOff = StackOffsets.getNewTmpPosOffFromFP();
+
     Reg = getRegNotUsedByThisInst(RC, MInst);
-    MIBef = cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
-    MIAft = cpMem2RegMI(MEI.getFramePointer(), TmpOff, Reg, RegType );
+    MIBef = MRI.cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
+    MIAft = MRI.cpMem2RegMI(MRI.getFramePointer(), TmpOff, Reg, RegType );
   }
 
   return Reg;
@@ -721,8 +727,10 @@
 // if it contains many spilled operands. Each time it is called, it finds
 // a register which is not live at that instruction and also which is not
 // used by other spilled operands of the same instruction.
+// Return register number is relative to the register class. NOT
+// unified number
 //----------------------------------------------------------------------------
-int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC, 
+int PhyRegAlloc::getUnusedRegAtMI(RegClass *RC, 
 				  const MachineInstr *MInst, 
 				  const LiveVarSet *LVSetBef) {
 
@@ -730,7 +738,7 @@
   
   bool *IsColorUsedArr = RC->getIsColorUsedArr();
   
-  for(unsigned i=0; i <  NumAvailRegs; i++);
+  for(unsigned i=0; i <  NumAvailRegs; i++)
       IsColorUsedArr[i] = false;
       
   LiveVarSet::const_iterator LIt = LVSetBef->begin();
@@ -767,7 +775,6 @@
 }
 
 
-#endif
 
 //----------------------------------------------------------------------------
 // This method modifies the IsColorUsedArr of the register class passed to it.
@@ -1120,56 +1127,6 @@
 
 
 
-
-void PhyRegAlloc::insertPhiEleminateInstrns() {
-
-  vector< const MachineInstr *>:: const_iterator It = PhiInstList.begin();
-
-  for( ; It !=  PhiInstList.end(); ++It ) {
-
-    const MachineInstr *PhiMI = *It;
-
-    Value *Def =  (PhiMI->getOperand(0)).getVRegValue();
-    const LiveRange *LROfDef = LRI.getLiveRangeForValue( Def );
-
-    assert(LROfDef && "NO LR for a def of phi");
-
-    for(unsigned OpNum=1; OpNum < PhiMI->getNumOperands(); ++OpNum) {
-
-      if( OpNum % 2) {   // i.e., the  
-
-	Value *Use =  (PhiMI->getOperand(OpNum)).getVRegValue();
-
-	const LiveRange *LROfUse = LRI.getLiveRangeForValue( Use );
-
-	if( LROfUse != LROfDef) {
-
-	  // the result of the phi received a live range different to
-	  // that of this use, so copy it
-
-	  const BasicBlock *BB =  
-	    (BasicBlock *) (PhiMI->getOperand(OpNum+1)).getVRegValue();
-
-	  MachineCodeForBasicBlock& MIVec = (BB)->getMachineInstrVec();
-
-	  MachineInstr *AdI = MRI.cpValue2Value(Use, Def);
-
-	  MIVec.push_back( AdI );
-
-	  cerr << "\n%%% Added a phi elimination instr: " << *AdI;
-
-	} // if LRs are different
-	
-      } // if operand is an incoming Value (i.e., not a BB)
-      
-    } // for all phi operands
-
-  } // for all phi instrns in PhiInstMap
-    
-}
-
-
-
 //----------------------------------------------------------------------------
 // The entry pont to Register Allocation
 //----------------------------------------------------------------------------