commit 81b2928d80047cb6c8ae0048185742abae1d9dfa
author Jim Grosbach <grosbach@apple.com> Wed Oct 12 21:59:02 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Wed Oct 12 21:59:02 2011 +0000
tree 9c1182c7dd0229a1196cc850b6b3d83782f3facb
parent 90196fced249e2bfe693391022541b802a7b8aa7

ARM addrmode5 represents the 'U' bit of the encoding backwards.

The disassembler needs to use the AM5 factory methods instead of just
building up the immediate directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141819 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 7cead8c..d33cb94 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1248,48 +1248,51 @@
     case ARM::t2LDC2L_OFFSET:
     case ARM::t2LDC2_PRE:
     case ARM::t2LDC2L_PRE:
-    case ARM::t2LDC2_POST:
-    case ARM::t2LDC2L_POST:
     case ARM::t2STC2_OFFSET:
     case ARM::t2STC2L_OFFSET:
     case ARM::t2STC2_PRE:
     case ARM::t2STC2L_PRE:
-    case ARM::t2STC2_POST:
-    case ARM::t2STC2L_POST:
     case ARM::LDC2_OFFSET:
     case ARM::LDC2L_OFFSET:
     case ARM::LDC2_PRE:
     case ARM::LDC2L_PRE:
-    case ARM::LDC2_POST:
-    case ARM::LDC2L_POST:
     case ARM::STC2_OFFSET:
     case ARM::STC2L_OFFSET:
     case ARM::STC2_PRE:
     case ARM::STC2L_PRE:
-    case ARM::STC2_POST:
-    case ARM::STC2L_POST:
     case ARM::t2LDC_OFFSET:
     case ARM::t2LDCL_OFFSET:
     case ARM::t2LDC_PRE:
     case ARM::t2LDCL_PRE:
-    case ARM::t2LDC_POST:
-    case ARM::t2LDCL_POST:
     case ARM::t2STC_OFFSET:
     case ARM::t2STCL_OFFSET:
     case ARM::t2STC_PRE:
     case ARM::t2STCL_PRE:
-    case ARM::t2STC_POST:
-    case ARM::t2STCL_POST:
     case ARM::LDC_OFFSET:
     case ARM::LDCL_OFFSET:
     case ARM::LDC_PRE:
     case ARM::LDCL_PRE:
-    case ARM::LDC_POST:
-    case ARM::LDCL_POST:
     case ARM::STC_OFFSET:
     case ARM::STCL_OFFSET:
     case ARM::STC_PRE:
     case ARM::STCL_PRE:
+      imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm);
+      Inst.addOperand(MCOperand::CreateImm(imm));
+      break;
+    case ARM::t2LDC2_POST:
+    case ARM::t2LDC2L_POST:
+    case ARM::t2STC2_POST:
+    case ARM::t2STC2L_POST:
+    case ARM::LDC2_POST:
+    case ARM::LDC2L_POST:
+    case ARM::STC2_POST:
+    case ARM::STC2L_POST:
+    case ARM::t2LDC_POST:
+    case ARM::t2LDCL_POST:
+    case ARM::t2STC_POST:
+    case ARM::t2STCL_POST:
+    case ARM::LDC_POST:
+    case ARM::LDCL_POST:
     case ARM::STC_POST:
     case ARM::STCL_POST:
       imm |= U << 8;