Add references to delay slot filler pass.
Fill in addPassesToJITCompile method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12729 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Sparc/Sparc.h b/lib/Target/Sparc/Sparc.h
index 1cade3c..44ee15a 100644
--- a/lib/Target/Sparc/Sparc.h
+++ b/lib/Target/Sparc/Sparc.h
@@ -25,6 +25,7 @@
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,
TargetMachine &TM);
+ FunctionPass *createSparcV8DelaySlotFillerPass(TargetMachine &TM);
} // end namespace llvm;
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index 1b5b80a..9cd97ee 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -54,6 +54,12 @@
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
+ PM.add(createSparcV8DelaySlotFillerPass(*this));
+
+ // Print machine instructions after filling delay slots.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
// Output assembly language.
PM.add(createSparcV8CodePrinterPass(Out, *this));
@@ -66,7 +72,23 @@
/// implement a fast dynamic compiler for this target.
///
void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // <insert instruction selector passes here>
+ PM.add(createSparcV8SimpleInstructionSelector(TM));
+
+ // Print machine instructions as they were initially generated.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
+
+ // Print machine instructions after register allocation and prolog/epilog
+ // insertion.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+ PM.add(createSparcV8DelaySlotFillerPass(TM));
+
+ // Print machine instructions after filling delay slots.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
}
diff --git a/lib/Target/SparcV8/SparcV8.h b/lib/Target/SparcV8/SparcV8.h
index 1cade3c..44ee15a 100644
--- a/lib/Target/SparcV8/SparcV8.h
+++ b/lib/Target/SparcV8/SparcV8.h
@@ -25,6 +25,7 @@
FunctionPass *createSparcV8SimpleInstructionSelector(TargetMachine &TM);
FunctionPass *createSparcV8CodePrinterPass(std::ostream &OS,
TargetMachine &TM);
+ FunctionPass *createSparcV8DelaySlotFillerPass(TargetMachine &TM);
} // end namespace llvm;
diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
index 1b5b80a..9cd97ee 100644
--- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp
+++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp
@@ -54,6 +54,12 @@
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(&std::cerr));
+ PM.add(createSparcV8DelaySlotFillerPass(*this));
+
+ // Print machine instructions after filling delay slots.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
// Output assembly language.
PM.add(createSparcV8CodePrinterPass(Out, *this));
@@ -66,7 +72,23 @@
/// implement a fast dynamic compiler for this target.
///
void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
- // <insert instruction selector passes here>
+ PM.add(createSparcV8SimpleInstructionSelector(TM));
+
+ // Print machine instructions as they were initially generated.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
+
+ // Print machine instructions after register allocation and prolog/epilog
+ // insertion.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
+
+ PM.add(createSparcV8DelaySlotFillerPass(TM));
+
+ // Print machine instructions after filling delay slots.
+ if (PrintMachineCode)
+ PM.add(createMachineFunctionPrinterPass(&std::cerr));
}