tree 70105d4b18d4446b27e5b42f4095a6dca0edee25
parent f11ad9ef46d67b5f52f7c410d5c4451e81d154e4
author Chris Lattner <sabre@nondot.org> 1106419093 +0000
committer Chris Lattner <sabre@nondot.org> 1106419093 +0000

Implement factoring of instruction pattern strings.  In particular, instead of
emitting code like this:

  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...

Emit code like this:

  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;

This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19755 91177308-0d34-0410-b5e6-96231b3b80d8