commit 8b8515c225c799e9df69bde8ffffa3c72cec9445
author Jim Grosbach <grosbach@apple.com> Fri Mar 11 20:31:17 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Fri Mar 11 20:31:17 2011 +0000
tree 59139bfc431dea8e7a7ad27f91ded685cc8399d8
parent 1558df79b4b2b6558c6d107b62e4dab2564bd793

ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
and VDUPLN32d, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMExpandPseudoInsts.cpp

diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index d221f30..0891453 100644
--- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -1018,7 +1018,8 @@
     }
     case ARM::VDUPfqf:
     case ARM::VDUPfdf:{
-      unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLNfq : ARM::VDUPLNfd;
+      unsigned NewOpc = Opcode == ARM::VDUPfqf ? ARM::VDUPLN32q :
+        ARM::VDUPLN32d;
       MachineInstrBuilder MIB =
         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
       unsigned OpIdx = 0;