Use ExecutionDepsFix instead of NEONMoveFix.
This enables NEON domain tracking across basic blocks, but should
otherwise do the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140772 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 70ac487..3083097 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -2732,9 +2732,11 @@
//
// We use the following execution domain numbering:
//
-// 0: Generic
-// 1: VFP
-// 2: NEON
+enum ARMExeDomain {
+ ExeGeneric = 0,
+ ExeVFP = 1,
+ ExeNEON = 2
+};
//
// Also see ARMInstrFormats.td and Domain* enums in ARMBaseInfo.h
//
@@ -2743,33 +2745,41 @@
// VMOVD is a VFP instruction, but can be changed to NEON if it isn't
// predicated.
if (MI->getOpcode() == ARM::VMOVD && !isPredicated(MI))
- return std::make_pair(1, 3);
+ return std::make_pair(ExeVFP, (1<<ExeVFP) | (1<<ExeNEON));
// No other instructions can be swizzled, so just determine their domain.
unsigned Domain = MI->getDesc().TSFlags & ARMII::DomainMask;
if (Domain & ARMII::DomainNEON)
- return std::make_pair(2, 0);
+ return std::make_pair(ExeNEON, 0);
// Certain instructions can go either way on Cortex-A8.
// Treat them as NEON instructions.
if ((Domain & ARMII::DomainNEONA8) && Subtarget.isCortexA8())
- return std::make_pair(2, 0);
+ return std::make_pair(ExeNEON, 0);
if (Domain & ARMII::DomainVFP)
- return std::make_pair(1, 0);
+ return std::make_pair(ExeVFP, 0);
- return std::make_pair(0, 0);
+ return std::make_pair(ExeGeneric, 0);
}
void
ARMBaseInstrInfo::setExecutionDomain(MachineInstr *MI, unsigned Domain) const {
// We only know how to change VMOVD into VORR.
assert(MI->getOpcode() == ARM::VMOVD && "Can only swizzle VMOVD");
- if (Domain != 2)
+ if (Domain != ExeNEON)
return;
+ // Zap the predicate operands.
+ assert(!isPredicated(MI) && "Cannot predicate a VORRd");
+ MI->RemoveOperand(3);
+ MI->RemoveOperand(2);
+
// Change to a VORRd which requires two identical use operands.
MI->setDesc(get(ARM::VORRd));
- MachineInstrBuilder(MI).addReg(MI->getOperand(1).getReg());
+
+ // Add the extra source operand and new predicates.
+ // This will go before any implicit ops.
+ AddDefaultPred(MachineInstrBuilder(MI).addReg(MI->getOperand(1).getReg()));
}
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 2cd818a..f779ede 100644
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -118,7 +118,7 @@
if (!Subtarget.isThumb1Only())
PM.add(createARMLoadStoreOptimizationPass());
if (Subtarget.hasNEON())
- PM.add(createNEONMoveFixPass());
+ PM.add(createExecutionDependencyFixPass(&ARM::DPRRegClass));
}
// Expand some pseudo instructions into multiple instructions to allow