Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177243 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 5f6c110..4ed5534a6 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1801,6 +1801,12 @@
case X86::SUB16i16: return convert16i16to16ri8(Inst, X86::SUB16ri8);
case X86::SUB32i32: return convert32i32to32ri8(Inst, X86::SUB32ri8);
case X86::SUB64i32: return convert64i32to64ri8(Inst, X86::SUB64ri8);
+ case X86::ADC16i16: return convert16i16to16ri8(Inst, X86::ADC16ri8);
+ case X86::ADC32i32: return convert32i32to32ri8(Inst, X86::ADC32ri8);
+ case X86::ADC64i32: return convert64i32to64ri8(Inst, X86::ADC64ri8);
+ case X86::SBB16i16: return convert16i16to16ri8(Inst, X86::SBB16ri8);
+ case X86::SBB32i32: return convert32i32to32ri8(Inst, X86::SBB32ri8);
+ case X86::SBB64i32: return convert64i32to64ri8(Inst, X86::SBB64ri8);
}
}
diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s
index 1350364..9806ac3 100644
--- a/test/MC/X86/intel-syntax-encoding.s
+++ b/test/MC/X86/intel-syntax-encoding.s
@@ -31,6 +31,20 @@
// CHECK: encoding: [0x48,0x83,0xc0,0xf4]
add rax, -12
+// CHECK: encoding: [0x66,0x83,0xd0,0xf4]
+ adc ax, -12
+// CHECK: encoding: [0x83,0xd0,0xf4]
+ adc eax, -12
+// CHECK: encoding: [0x48,0x83,0xd0,0xf4]
+ adc rax, -12
+
+// CHECK: encoding: [0x66,0x83,0xd8,0xf4]
+ sbb ax, -12
+// CHECK: encoding: [0x83,0xd8,0xf4]
+ sbb eax, -12
+// CHECK: encoding: [0x48,0x83,0xd8,0xf4]
+ sbb rax, -12
+
// CHECK: encoding: [0x66,0x83,0xf8,0xf4]
cmp ax, -12
// CHECK: encoding: [0x83,0xf8,0xf4]