Revert r150565 again. Appears to be a stage2 failure with dragonegg.
I'll put MachineLICM back before PEI. All my arm/x86 benchmarks look good, but buildbots don't like it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150568 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp
index 8fb9416..ec1f2b4 100644
--- a/lib/CodeGen/Passes.cpp
+++ b/lib/CodeGen/Passes.cpp
@@ -582,8 +582,14 @@
//
// FIXME: Re-enable coloring with register when it's capable of adding
// kill markers.
- if (addPass(StackSlotColoringID) != &NoPassID)
- printAndVerify("After StackSlotColoring");
+ addPass(StackSlotColoringID);
+
+ // Run post-ra machine LICM to hoist reloads / remats.
+ //
+ // FIXME: can this move into MachineLateOptimization?
+ addPass(PostRAMachineLICMID);
+
+ printAndVerify("After StackSlotColoring and postra Machine LICM");
}
//===---------------------------------------------------------------------===//
@@ -592,10 +598,6 @@
/// Add passes that optimize machine instructions after register allocation.
void TargetPassConfig::addMachineLateOptimization() {
- // Run post-ra machine LICM to hoist reloads / remats.
- if (addPass(PostRAMachineLICMID) != &NoPassID)
- printAndVerify("After postra Machine LICM");
-
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (addPass(BranchFolderPassID) != &NoPassID)
printNoVerify("After BranchFolding");