Implement fast-isel support for zero-extending from i1.
It turns out that this is a fairly common operation,
and it's easy enough to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56990 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index c0e8418..17b37a3 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -386,10 +386,21 @@
if (SrcVT == MVT::Other || !SrcVT.isSimple() ||
DstVT == MVT::Other || !DstVT.isSimple() ||
- !TLI.isTypeLegal(SrcVT) || !TLI.isTypeLegal(DstVT))
+ !TLI.isTypeLegal(DstVT))
// Unhandled type. Halt "fast" selection and bail.
return false;
+ // Check if the source operand is legal. Or as a special case,
+ // it may be i1 if we're doing zero-extension because that's
+ // trivially easy and somewhat common.
+ if (!TLI.isTypeLegal(SrcVT)) {
+ if (SrcVT == MVT::i1 && Opcode == ISD::ZERO_EXTEND)
+ SrcVT = TLI.getTypeToTransformTo(SrcVT);
+ else
+ // Unhandled type. Halt "fast" selection and bail.
+ return false;
+ }
+
unsigned InputReg = getRegForValue(I->getOperand(0));
if (!InputReg)
// Unhandled operand. Halt "fast" selection and bail.