commit 92a202213bb4c20301abf6ab64e46df3695e60bf
author Owen Anderson <resistor@mac.com> Thu Jul 21 18:54:16 2011 +0000
committer Owen Anderson <resistor@mac.com> Thu Jul 21 18:54:16 2011 +0000
tree ea32134f1f818aa4c39815bf26129c890bff42e9
parent a305fe75450348677a228f7d0f1cc53b2504b562

Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates.  This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/EDEmitter.cpp

diff --git a/utils/TableGen/EDEmitter.cpp b/utils/TableGen/EDEmitter.cpp
index a1ad83c..7711464 100644
--- a/utils/TableGen/EDEmitter.cpp
+++ b/utils/TableGen/EDEmitter.cpp
@@ -623,7 +623,8 @@
 
   MISC("t_bltarget", "kOperandTypeARMBranchTarget");              // ?
   MISC("t_blxtarget", "kOperandTypeARMBranchTarget");             // ?
-  MISC("so_reg", "kOperandTypeARMSoReg");                         // R, R, I
+  MISC("so_reg_imm", "kOperandTypeARMSoReg");                         // R, R, I
+  MISC("so_reg_reg", "kOperandTypeARMSoReg");                         // R, R, I
   MISC("shift_so_reg", "kOperandTypeARMSoReg");                   // R, R, I
   MISC("t2_so_reg", "kOperandTypeThumb2SoReg");                   // R, I
   MISC("so_imm", "kOperandTypeARMSoImm");                         // I