Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index f1c5ce8..3fd06a9 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2310,12 +2310,15 @@
CHECK(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder));
- if (Inst.getOpcode() == ARM::tADR)
- Inst.addOperand(MCOperand::CreateReg(ARM::PC));
- else if (Inst.getOpcode() == ARM::tADDrSPi)
- Inst.addOperand(MCOperand::CreateReg(ARM::SP));
- else
- return Fail;
+ switch(Inst.getOpcode()) {
+ case ARM::tADR:
+ break;
+ case ARM::tADDrSPi:
+ Inst.addOperand(MCOperand::CreateReg(ARM::SP));
+ break;
+ default:
+ return Fail;
+ }
Inst.addOperand(MCOperand::CreateImm(imm));
return S;