commit | 979e0a141487a4cd8538dffbe09eca544acf14c7 | [log] [tgz] |
---|---|---|
author | Eric Christopher <echristo@apple.com> | Thu Aug 19 15:35:27 2010 +0000 |
committer | Eric Christopher <echristo@apple.com> | Thu Aug 19 15:35:27 2010 +0000 |
tree | c64e28a379e508580b0112879d6dcebb172d883d | |
parent | 44cbde85badb60c7078e37e14575c15e671521b1 [diff] [blame] |
Silence warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111518 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 211e319..6dbf0fc 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -137,7 +137,7 @@ // Do we optionally set a predicate? Preds is size > 0 iff the predicate // defines CPSR. All other OptionalDefines in ARM are the CCR register. - bool CPSR; + bool CPSR = false; if (DefinesOptionalPredicate(MI, &CPSR)) { if (CPSR) AddDefaultT1CC(MIB);