commit 9ebfbf8b9fd5f982e0db9293808bd32168615ba9
author Craig Topper <craig.topper@gmail.com> Mon Mar 05 05:37:41 2012 +0000
committer Craig Topper <craig.topper@gmail.com> Mon Mar 05 05:37:41 2012 +0000
tree 77ce098c0d4851df8117d3d0e669b8580911a98f
parent ec93b6decad4b95fd8a9531dc024b2b1881019bf

Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/IfConversion.cpp

diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp
index e058376..75ae5b9 100644
--- a/lib/CodeGen/IfConversion.cpp
+++ b/lib/CodeGen/IfConversion.cpp
@@ -962,7 +962,7 @@
          E = BB->livein_end(); I != E; ++I) {
     unsigned Reg = *I;
     Redefs.insert(Reg);
-    for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
+    for (const uint16_t *Subreg = TRI->getSubRegisters(Reg);
          *Subreg; ++Subreg)
       Redefs.insert(*Subreg);
   }
@@ -983,7 +983,7 @@
       Defs.push_back(Reg);
     else if (MO.isKill()) {
       Redefs.erase(Reg);
-      for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
+      for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
         Redefs.erase(*SR);
     }
   }
@@ -996,7 +996,7 @@
                                                 true/*IsImp*/,false/*IsKill*/));
     } else {
       Redefs.insert(Reg);
-      for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
+      for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
         Redefs.insert(*SR);
     }
   }
@@ -1335,7 +1335,7 @@
           // These are defined before ctrl flow reach the 'false' instructions.
           // They cannot be modified by the 'true' instructions.
           ExtUses.insert(Reg);
-          for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
+          for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
             ExtUses.insert(*SR);
         }
       }
@@ -1344,7 +1344,7 @@
         unsigned Reg = Defs[i];
         if (!ExtUses.count(Reg)) {
           RedefsByFalse.insert(Reg);
-          for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
+          for (const uint16_t *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
             RedefsByFalse.insert(*SR);
         }
       }