commit 9f2e160f7ae90a7a80b17e38ad06f2c706515115
author Kevin Enderby <enderby@apple.com> Tue Mar 20 17:41:51 2012 +0000
committer Kevin Enderby <enderby@apple.com> Tue Mar 20 17:41:51 2012 +0000
tree 715ebd3f40002d380f9a44eb55488968edb8838c
parent 07cdd80ccc1a07edc565199c62d35ea0d80c6c1c

Fix assembling ARM vst2 instructions with double-spaced registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153099 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ccdadd8..911eb13 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -1102,7 +1102,7 @@
   }
 
   bool isVecListDPairSpaced() const {
-    if (!isSingleSpacedVectorList()) return false;
+    if (isSingleSpacedVectorList()) return false;
     return (ARMMCRegisterClasses[ARM::DPairSpcRegClassID]
               .contains(VectorList.RegNum));
   }