| ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t |
| ; RUN: grep {vpmax\\.s8} %t | count 1 |
| ; RUN: grep {vpmax\\.s16} %t | count 1 |
| ; RUN: grep {vpmax\\.s32} %t | count 1 |
| ; RUN: grep {vpmax\\.u8} %t | count 1 |
| ; RUN: grep {vpmax\\.u16} %t | count 1 |
| ; RUN: grep {vpmax\\.u32} %t | count 1 |
| ; RUN: grep {vpmax\\.f32} %t | count 1 |
| |
| define <8 x i8> @vpmaxs8(<8 x i8>* %A, <8 x i8>* %B) nounwind { |
| %tmp1 = load <8 x i8>* %A |
| %tmp2 = load <8 x i8>* %B |
| %tmp3 = call <8 x i8> @llvm.arm.neon.vpmaxs.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) |
| ret <8 x i8> %tmp3 |
| } |
| |
| define <4 x i16> @vpmaxs16(<4 x i16>* %A, <4 x i16>* %B) nounwind { |
| %tmp1 = load <4 x i16>* %A |
| %tmp2 = load <4 x i16>* %B |
| %tmp3 = call <4 x i16> @llvm.arm.neon.vpmaxs.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) |
| ret <4 x i16> %tmp3 |
| } |
| |
| define <2 x i32> @vpmaxs32(<2 x i32>* %A, <2 x i32>* %B) nounwind { |
| %tmp1 = load <2 x i32>* %A |
| %tmp2 = load <2 x i32>* %B |
| %tmp3 = call <2 x i32> @llvm.arm.neon.vpmaxs.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2) |
| ret <2 x i32> %tmp3 |
| } |
| |
| define <8 x i8> @vpmaxu8(<8 x i8>* %A, <8 x i8>* %B) nounwind { |
| %tmp1 = load <8 x i8>* %A |
| %tmp2 = load <8 x i8>* %B |
| %tmp3 = call <8 x i8> @llvm.arm.neon.vpmaxu.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) |
| ret <8 x i8> %tmp3 |
| } |
| |
| define <4 x i16> @vpmaxu16(<4 x i16>* %A, <4 x i16>* %B) nounwind { |
| %tmp1 = load <4 x i16>* %A |
| %tmp2 = load <4 x i16>* %B |
| %tmp3 = call <4 x i16> @llvm.arm.neon.vpmaxu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) |
| ret <4 x i16> %tmp3 |
| } |
| |
| define <2 x i32> @vpmaxu32(<2 x i32>* %A, <2 x i32>* %B) nounwind { |
| %tmp1 = load <2 x i32>* %A |
| %tmp2 = load <2 x i32>* %B |
| %tmp3 = call <2 x i32> @llvm.arm.neon.vpmaxu.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2) |
| ret <2 x i32> %tmp3 |
| } |
| |
| define <2 x float> @vpmaxf32(<2 x float>* %A, <2 x float>* %B) nounwind { |
| %tmp1 = load <2 x float>* %A |
| %tmp2 = load <2 x float>* %B |
| %tmp3 = call <2 x float> @llvm.arm.neon.vpmaxf.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) |
| ret <2 x float> %tmp3 |
| } |
| |
| declare <8 x i8> @llvm.arm.neon.vpmaxs.v8i8(<8 x i8>, <8 x i8>) nounwind readnone |
| declare <4 x i16> @llvm.arm.neon.vpmaxs.v4i16(<4 x i16>, <4 x i16>) nounwind readnone |
| declare <2 x i32> @llvm.arm.neon.vpmaxs.v2i32(<2 x i32>, <2 x i32>) nounwind readnone |
| |
| declare <8 x i8> @llvm.arm.neon.vpmaxu.v8i8(<8 x i8>, <8 x i8>) nounwind readnone |
| declare <4 x i16> @llvm.arm.neon.vpmaxu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone |
| declare <2 x i32> @llvm.arm.neon.vpmaxu.v2i32(<2 x i32>, <2 x i32>) nounwind readnone |
| |
| declare <2 x float> @llvm.arm.neon.vpmaxf.v2f32(<2 x float>, <2 x float>) nounwind readnone |