commit a00adba6a7e9b0f6600cb6c8c627bb0c705d2f59
author Devang Patel <dpatel@apple.com> Tue Apr 27 22:24:37 2010 +0000
committer Devang Patel <dpatel@apple.com> Tue Apr 27 22:24:37 2010 +0000
tree 7dd5bde6358366a68edb64fd458d72e7ae0792d3
parent 97303ee27d3985363987ccdd04a8147713462308

Use MachineOperand::is* predicates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102472 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp

diff --git a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
index 2a1f555..9f4aff6 100644
--- a/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
+++ b/lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
@@ -73,7 +73,7 @@
 void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
                                    raw_ostream &O) {
   const MachineOperand &MO = MI->getOperand(opNum);
-  if (MO.getType() == MachineOperand::MO_Register) {
+  if (MO.isReg()) {
     assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
            "Not physreg??");
     O << getRegisterName(MO.getReg());