| commit | a0d77375cb66caf9235a698526f2b2aae389f723 | [log] [tgz] |
|---|---|---|
| author | sampo <sampo@91177308-0d34-0410-b5e6-96231b3b80d8> | Sat Jan 24 22:12:48 2009 +0000 |
| committer | sampo <sampo@91177308-0d34-0410-b5e6-96231b3b80d8> | Sat Jan 24 22:12:48 2009 +0000 |
| tree | ec0c1ec1d044f11cddb595ff61704a77b2f8281b | |
| parent | 6f7b7d35fa0307a05da99d5d11d7240ab19de828 [diff] [blame] |
Fix an indent and a typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 10baccb..723c512 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3287,7 +3287,7 @@ case ISD::MUL: if (VT == MVT::i32) LC = RTLIB::MUL_I32; - else if (VT == MVT::i64) + else if (VT == MVT::i64) LC = RTLIB::MUL_I64; break; case ISD::FPOW: