Prefix IR dumps with LiveInterval indices when possible.  This turns
this:

	%ESI<def> = MOV32rr %EDI<kill>
	ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
	%reg1027<def> = MOVZX64rr32 %ESI
	%reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead>
	%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
	%RDI<def> = MOV64rr %RSP
	%RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead>
	%RSP<def> = MOV64rr %RDI

into this:

4	%reg1024<def> = MOV32rr %EDI<kill>
12	ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
20	%reg1025<def> = MOVZX64rr32 %reg1024
28	%reg1026<def> = MOV64rr %reg1025<kill>
36	%reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead>
44	%reg1027<def> = MOV64rr %reg1026<kill>
52	%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
60	%reg1028<def> = MOV64rr %RSP
68	%reg1029<def> = MOV64rr %reg1028<kill>
76	%reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead>
84	%RSP<def> = MOV64rr %reg1029

This helps greatly when debugging register allocation and coalescing
problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76615 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 261fa5e..aba6ff1 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -464,7 +464,7 @@
   i2miMap_.resize(highestSlot + 1);
   for (Mi2IndexMap::iterator MI = mi2iMap_.begin(), ME = mi2iMap_.end();
        MI != ME; ++MI) {
-    i2miMap_[MI->second] = MI->first;
+    i2miMap_[MI->second] = const_cast<MachineInstr *>(MI->first);
   }
 
 }
@@ -501,14 +501,7 @@
   }
 
   O << "********** MACHINEINSTRS **********\n";
-  for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
-       mbbi != mbbe; ++mbbi) {
-    O << ((Value*)mbbi->getBasicBlock())->getName() << ":\n";
-    for (MachineBasicBlock::iterator mii = mbbi->begin(),
-           mie = mbbi->end(); mii != mie; ++mii) {
-      O << getInstructionIndex(mii) << '\t' << *mii;
-    }
-  }
+  mf_->print(O, IntervalPrefixPrinter(*this));
 }
 
 /// conflictsWithPhysRegDef - Returns true if the specified register