Add shifts and reg-imm address matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
index 7e3b79a..568c99b 100644
--- a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
+++ b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
@@ -50,6 +50,8 @@
void printOperand(const MachineInstr *MI, int OpNum,
const char* Modifier = 0);
+ void printRIAddrOperand(const MachineInstr *MI, int OpNum,
+ const char* Modifier = 0);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr * MI);
@@ -167,7 +169,7 @@
}
void SystemZAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
- const char* Modifier) {
+ const char* Modifier) {
const MachineOperand &MO = MI->getOperand(OpNum);
switch (MO.getType()) {
case MachineOperand::MO_Register:
@@ -185,3 +187,19 @@
assert(0 && "Not implemented yet!");
}
}
+
+void SystemZAsmPrinter::printRIAddrOperand(const MachineInstr *MI, int OpNum,
+ const char* Modifier) {
+ const MachineOperand &Base = MI->getOperand(OpNum);
+
+ // Print displacement operand.
+ printOperand(MI, OpNum+1);
+
+ // Print base operand (if any)
+ if (!(Base.isReg() && Base.getReg() == SystemZ::R0D)) {
+ O << '(';
+ printOperand(MI, OpNum);
+ O << ')';
+ }
+}
+