Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139250 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 3b4e1c5..fa9eed4 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -97,6 +97,7 @@
return false;
}
+
// Forward declare these because the autogenerated code will reference them.
// Definitions are further down.
static DecodeStatus DecodeGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
@@ -319,6 +320,9 @@
raw_ostream &os) const {
uint8_t bytes[4];
+ assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
+ "Asked to disassemble an ARM instruction but Subtarget is in Thumb mode!");
+
// We want to read exactly 4 bytes of data.
if (Region.readBytes(Address, 4, (uint8_t*)bytes, NULL) == -1) {
Size = 0;
@@ -332,7 +336,7 @@
(bytes[0] << 0);
// Calling the auto-generated decoder function.
- DecodeStatus result = decodeARMInstruction32(MI, insn, Address, this);
+ DecodeStatus result = decodeARMInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
@@ -342,7 +346,7 @@
// FIXME: This shouldn't really exist. It's an artifact of the
// fact that we fail to encode a few instructions properly for Thumb.
MI.clear();
- result = decodeCommonInstruction32(MI, insn, Address, this);
+ result = decodeCommonInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
@@ -351,14 +355,14 @@
// VFP and NEON instructions, similarly, are shared between ARM
// and Thumb modes.
MI.clear();
- result = decodeVFPInstruction32(MI, insn, Address, this);
+ result = decodeVFPInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
return result;
}
MI.clear();
- result = decodeNEONDataInstruction32(MI, insn, Address, this);
+ result = decodeNEONDataInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
@@ -369,7 +373,7 @@
}
MI.clear();
- result = decodeNEONLoadStoreInstruction32(MI, insn, Address, this);
+ result = decodeNEONLoadStoreInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
@@ -380,7 +384,7 @@
}
MI.clear();
- result = decodeNEONDupInstruction32(MI, insn, Address, this);
+ result = decodeNEONDupInstruction32(MI, insn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
// Add a fake predicate operand, because we share these instruction
@@ -505,6 +509,9 @@
raw_ostream &os) const {
uint8_t bytes[4];
+ assert((STI.getFeatureBits() & ARM::ModeThumb) &&
+ "Asked to disassemble in Thumb mode but Subtarget is in ARM mode!");
+
// We want to read exactly 2 bytes of data.
if (Region.readBytes(Address, 2, (uint8_t*)bytes, NULL) == -1) {
Size = 0;
@@ -512,7 +519,7 @@
}
uint16_t insn16 = (bytes[1] << 8) | bytes[0];
- DecodeStatus result = decodeThumbInstruction16(MI, insn16, Address, this);
+ DecodeStatus result = decodeThumbInstruction16(MI, insn16, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 2;
AddThumbPredicate(MI);
@@ -520,7 +527,7 @@
}
MI.clear();
- result = decodeThumbSBitInstruction16(MI, insn16, Address, this);
+ result = decodeThumbSBitInstruction16(MI, insn16, Address, this, STI);
if (result) {
Size = 2;
bool InITBlock = !ITBlock.empty();
@@ -530,7 +537,7 @@
}
MI.clear();
- result = decodeThumb2Instruction16(MI, insn16, Address, this);
+ result = decodeThumb2Instruction16(MI, insn16, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 2;
AddThumbPredicate(MI);
@@ -570,7 +577,7 @@
(bytes[1] << 24) |
(bytes[0] << 16);
MI.clear();
- result = decodeThumbInstruction32(MI, insn32, Address, this);
+ result = decodeThumbInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
bool InITBlock = ITBlock.size();
@@ -580,7 +587,7 @@
}
MI.clear();
- result = decodeThumb2Instruction32(MI, insn32, Address, this);
+ result = decodeThumb2Instruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);
@@ -588,7 +595,7 @@
}
MI.clear();
- result = decodeCommonInstruction32(MI, insn32, Address, this);
+ result = decodeCommonInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);
@@ -596,7 +603,7 @@
}
MI.clear();
- result = decodeVFPInstruction32(MI, insn32, Address, this);
+ result = decodeVFPInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
UpdateThumbVFPPredicate(MI);
@@ -604,7 +611,7 @@
}
MI.clear();
- result = decodeNEONDupInstruction32(MI, insn32, Address, this);
+ result = decodeNEONDupInstruction32(MI, insn32, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);
@@ -616,7 +623,7 @@
uint32_t NEONLdStInsn = insn32;
NEONLdStInsn &= 0xF0FFFFFF;
NEONLdStInsn |= 0x04000000;
- result = decodeNEONLoadStoreInstruction32(MI, NEONLdStInsn, Address, this);
+ result = decodeNEONLoadStoreInstruction32(MI, NEONLdStInsn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);
@@ -630,7 +637,7 @@
NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
NEONDataInsn |= 0x12000000; // Set bits 28 and 25
- result = decodeNEONDataInstruction32(MI, NEONDataInsn, Address, this);
+ result = decodeNEONDataInstruction32(MI, NEONDataInsn, Address, this, STI);
if (result != MCDisassembler::Fail) {
Size = 4;
AddThumbPredicate(MI);