Fix a bogus srem rule - a negative value srem'd by a power-of-2
can have a non-negative result; for example, -16%16 is 0. Also,
clarify the related comments. This fixes PR2670.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54767 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 144dc6e..9eab89f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1656,15 +1656,13 @@
APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
- // The sign of a remainder is equal to the sign of the first
- // operand (zero being positive).
+ // If the sign bit of the first operand is zero, the sign bit of
+ // the result is zero. If the first operand has no one bits below
+ // the second operand's single 1 bit, its sign will be zero.
if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
KnownZero2 |= ~LowBits;
- else if (KnownOne2[BitWidth-1])
- KnownOne2 |= ~LowBits;
KnownZero |= KnownZero2 & Mask;
- KnownOne |= KnownOne2 & Mask;
assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
}