commit ab394bdcc0e89ce6dafae45fb7dd7420e77f14d7
author Evan Cheng <evan.cheng@apple.com> Thu Apr 03 08:53:17 2008 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Apr 03 08:53:17 2008 +0000
tree 5280598de42149f05437f6a67c9b3529f8d78c01
parent 90ce87b5bde326634bc0edddd74a426f11b7fe97

Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49157 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86CodeEmitter.cpp

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index e6cd412..15b7745 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -558,16 +558,10 @@
 
   bool Need0FPrefix = false;
   switch (Desc->TSFlags & X86II::Op0Mask) {
-  case X86II::TB:
-    Need0FPrefix = true;   // Two-byte opcode prefix
-    break;
-  case X86II::T8:
-    MCE.emitByte(0x0F);
-    MCE.emitByte(0x38);
-    break;
-  case X86II::TA:
-    MCE.emitByte(0x0F);
-    MCE.emitByte(0x3A);
+  case X86II::TB:  // Two-byte opcode prefix
+  case X86II::T8:  // 0F 38
+  case X86II::TA:  // 0F 3A
+    Need0FPrefix = true;
     break;
   case X86II::REP: break; // already handled.
   case X86II::XS:   // F3 0F
@@ -599,6 +593,15 @@
   if (Need0FPrefix)
     MCE.emitByte(0x0F);
 
+  switch (Desc->TSFlags & X86II::Op0Mask) {
+  case X86II::T8:  // 0F 38
+    MCE.emitByte(0x38);
+    break;
+  case X86II::TA:    // 0F 3A
+    MCE.emitByte(0x3A);
+    break;
+  }
+
   // If this is a two-address instruction, skip one of the register operands.
   unsigned NumOps = Desc->getNumOperands();
   unsigned CurOp = 0;