commit ad83d08ed04c541a2fbc8262a45077e565bb20e3
author NAKAMURA Takumi <geek4civic@gmail.com> Tue Sep 18 15:29:02 2012 +0000
committer NAKAMURA Takumi <geek4civic@gmail.com> Tue Sep 18 15:29:02 2012 +0000
tree f9beb623c828daedeea92e4c67bcbc7342861c00
parent 04800645267e438818ab68a32245e4770e560c3a

SROA.cpp: Appease msvc.

...I don't know why this could appease msvc...baad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164130 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/Scalar/SROA.cpp

diff --git a/lib/Transforms/Scalar/SROA.cpp b/lib/Transforms/Scalar/SROA.cpp
index c33fbee..09bcc33 100644
--- a/lib/Transforms/Scalar/SROA.cpp
+++ b/lib/Transforms/Scalar/SROA.cpp
@@ -2487,7 +2487,7 @@
   /// to the correct slot within the aggregate for \p Ty.
   template <void (AggLoadStoreRewriter::*emitFunc)(
                 IRBuilder<> &IRB, Type *Ty, Value *&Agg, Value *Ptr,
-                ArrayRef<unsigned> Indices, ArrayRef<Value *> GEPIndices,
+                ArrayRef<unsigned>, ArrayRef<Value *>,
                 const Twine &Name)>
   void emitSplitOps(IRBuilder<> &IRB, Type *Ty, Value *&Agg, Value *Ptr,
                     SmallVectorImpl<unsigned> &Indices,