Implement enough of the missing instalias support to get
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index b4b6331..f422106 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -357,12 +357,18 @@
MatchableInfo(const CodeGenInstruction &CGI)
: TheDef(CGI.TheDef), OperandList(CGI.Operands), AsmString(CGI.AsmString) {
+ InstrName = TheDef->getName();
}
MatchableInfo(const CodeGenInstAlias *Alias)
: TheDef(Alias->TheDef), OperandList(Alias->Operands),
AsmString(Alias->AsmString) {
-
+
+ // FIXME: Huge hack.
+ DefInit *DI = dynamic_cast<DefInit*>(Alias->Result->getOperator());
+ assert(DI);
+
+ InstrName = DI->getDef()->getName();
}
void Initialize(const AsmMatcherInfo &Info,
@@ -551,8 +557,6 @@
void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters) {
- InstrName = TheDef->getName();
-
// TODO: Eventually support asmparser for Variant != 0.
AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
@@ -974,7 +978,7 @@
// Validate the alias definitions.
II->Validate(CommentDelimiter, false);
- //Matchables.push_back(II.take());
+ Matchables.push_back(II.take());
}
// Build info for the register classes.