Unbreak mvi and friends - emit only 'significant' part of the operand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76041 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 570d354..4fccbf2 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -103,6 +103,12 @@
       return "SystemZ DAG->DAG Pattern Instruction Selection";
     }
 
+    /// getI8Imm - Return a target constant with the specified value, of type
+    /// i8.
+    inline SDValue getI8Imm(uint64_t Imm) {
+      return CurDAG->getTargetConstant(Imm, MVT::i8);
+    }
+
     /// getI16Imm - Return a target constant with the specified value, of type
     /// i16.
     inline SDValue getI16Imm(uint64_t Imm) {
diff --git a/lib/Target/SystemZ/SystemZOperands.td b/lib/Target/SystemZ/SystemZOperands.td
index f729668..156cace 100644
--- a/lib/Target/SystemZ/SystemZOperands.td
+++ b/lib/Target/SystemZ/SystemZOperands.td
@@ -32,6 +32,11 @@
 def SYSTEMZ_COND_NH  : PatLeaf<(i8 12)>;
 def SYSTEMZ_COND_NO  : PatLeaf<(i8 13)>;
 
+def LO8 : SDNodeXForm<imm, [{
+  // Transformation function: return low 8 bits.
+  return getI8Imm(N->getZExtValue() & 0x00000000000000FFULL);
+}]>;
+
 def LL16 : SDNodeXForm<imm, [{
   // Transformation function: return low 16 bits.
   return getI16Imm(N->getZExtValue() & 0x000000000000FFFFULL);
@@ -138,14 +143,14 @@
   }
 
   return false;
-}]>;
+}], LL16>;
 
 def immSExt32 : PatLeaf<(i64 imm), [{
   // immSExt32 predicate - true if the immediate fits in a 32-bit sign extended
   // field.
   uint64_t val = N->getZExtValue();
   return ((int64_t)val == (int32_t)val);
-}]>;
+}], LO32>;
 
 def i64lo32 : PatLeaf<(i64 imm), [{
   // i64lo32 predicate - true if the 64-bit immediate has only rightmost 32
@@ -173,25 +178,25 @@
   // i32immSExt8 predicate - True if the 32-bit immediate fits in a 8-bit
   // sign extended field.
   return (int32_t)N->getZExtValue() == (int8_t)N->getZExtValue();
-}]>;
+}], LO8>;
 
 def i32immSExt16 : PatLeaf<(i32 imm), [{
   // i32immSExt16 predicate - True if the 32-bit immediate fits in a 16-bit
   // sign extended field.
   return (int32_t)N->getZExtValue() == (int16_t)N->getZExtValue();
-}]>;
+}], LL16>;
 
 def i64immSExt32 : PatLeaf<(i64 imm), [{
   // i64immSExt32 predicate - True if the 64-bit immediate fits in a 32-bit
   // sign extended field.
   return (int64_t)N->getZExtValue() == (int32_t)N->getZExtValue();
-}]>;
+}], LO32>;
 
 def i64immZExt32 : PatLeaf<(i64 imm), [{
   // i64immZExt32 predicate - True if the 64-bit immediate fits in a 32-bit
   // zero extended field.
   return (uint64_t)N->getZExtValue() == (uint32_t)N->getZExtValue();
-}]>;
+}], LO32>;
 
 // extloads
 def extloadi32i8   : PatFrag<(ops node:$ptr), (i32 (extloadi8  node:$ptr))>;