Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
asm printer will print it as offset*4. e.g. bne cr0, $+8.
The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index b3d100c..78932a9 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -133,7 +133,7 @@
if (Displacement >= -32768 && Displacement <= 32767) {
BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
} else {
- BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
+ BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
}