commit bb1ee05253d965e0944351a21e9970c02b1aebfe
author Bill Wendling <isanbard@gmail.com> Tue Apr 10 22:10:25 2007 +0000
committer Bill Wendling <isanbard@gmail.com> Tue Apr 10 22:10:25 2007 +0000
tree d7efafbf4ec32844a6e908e5e0fada02eace8d1a
parent 773fd3855310f91aef4ef974ce57ed409d26341d

Add support for our first SSSE3 instruction "pmulhrsw".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86Subtarget.cpp

diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index cd6fb03..00e34d5 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -113,6 +113,7 @@
   if ((EDX >> 25) & 0x1) X86SSELevel = SSE1;
   if ((EDX >> 26) & 0x1) X86SSELevel = SSE2;
   if (ECX & 0x1)         X86SSELevel = SSE3;
+  if ((ECX >> 9)  & 0x1) X86SSELevel = SSSE3;
 
   if (memcmp(text.c, "GenuineIntel", 12) == 0) {
     X86::GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);