Fix LSR's IV sorting function to explicitly sort by bitwidth
after sorting by stride value. This prevents it from missing
IV reuse opportunities in a host-sensitive manner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64415 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index a5fcdb4..683f741 100644
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -1772,12 +1772,19 @@
int64_t RV = RHSC->getValue()->getSExtValue();
uint64_t ALV = (LV < 0) ? -LV : LV;
uint64_t ARV = (RV < 0) ? -RV : RV;
- if (ALV == ARV)
- return LV > RV;
- else
+ if (ALV == ARV) {
+ if (LV != RV)
+ return LV > RV;
+ } else {
return ALV < ARV;
+ }
+
+ // If it's the same value but different type, sort by bit width so
+ // that we emit larger induction variables before smaller
+ // ones, letting the smaller be re-written in terms of larger ones.
+ return RHS->getBitWidth() < LHS->getBitWidth();
}
- return (LHSC && !RHSC);
+ return LHSC && !RHSC;
}
};
}