Add sub reg-reg pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75916 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index c4121fe..0b8ab46 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -77,6 +77,12 @@
}
// FIXME: provide patterns for masked or-with-imm
+// FIXME: Provide proper encoding!
+def SUB64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
+ "sgr\t{$dst, $src2}",
+ [(set GR64:$dst, (sub GR64:$src1, GR64:$src2))]>;
+
+
let isCommutable = 1 in { // X = XOR Y, Z == X = XOR Z, Y
// FIXME: Provide proper encoding!
def XOR64rr : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
diff --git a/test/CodeGen/SystemZ/02-RetSub.ll b/test/CodeGen/SystemZ/02-RetSub.ll
new file mode 100644
index 0000000..16ade04
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetSub.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = sub i64 %a, %b
+ ret i64 %c
+}
\ No newline at end of file
diff --git a/test/CodeGen/SystemZ/02-RetSubImm.ll b/test/CodeGen/SystemZ/02-RetSubImm.ll
new file mode 100644
index 0000000..f90415f
--- /dev/null
+++ b/test/CodeGen/SystemZ/02-RetSubImm.ll
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc
+
+define i64 @foo(i64 %a, i64 %b) {
+entry:
+ %c = sub i64 %a, 1
+ ret i64 %c
+}
\ No newline at end of file