commit c1d30212e911d1e55ff6b25bffefb503708883c3
author Jim Grosbach <grosbach@apple.com> Wed Oct 27 00:19:44 2010 +0000
committer Jim Grosbach <grosbach@apple.com> Wed Oct 27 00:19:44 2010 +0000
tree de38cc3a1c143ca135f8deaefcfaad5d3ae6c0b5
parent 28e3fe961f2c4d6ce5317770f660c56cae3d2ec6

Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMFastISel.cpp

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 7cf7ec0..3b72285 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -746,7 +746,7 @@
       RC = ARM::GPRRegisterClass;
       break;
     case MVT::i8:
-      Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRB;
+      Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRBi12;
       RC = ARM::GPRRegisterClass;
       break;
     case MVT::i32:
@@ -774,8 +774,6 @@
   if (isFloat)
     Offset /= 4;
   
-  // The thumb and floating point instructions both take 2 operands, ARM takes
-  // another register.
   AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
                           TII.get(Opc), ResultReg)
                   .addReg(Base).addImm(Offset));