| commit | c8af02c403c1547c7d66aa3add3c8a2116d3d26e | [log] [tgz] |
|---|---|---|
| author | Chris Lattner <sabre@nondot.org> | Tue May 04 19:33:58 2004 +0000 |
| committer | Chris Lattner <sabre@nondot.org> | Tue May 04 19:33:58 2004 +0000 |
| tree | 8e146b2601df112722e2fd9106bc089b7dd5dc51 | |
| parent | 2dd5c96866406711cf20a6bb677a7d147ad3ac3d [diff] |
Improve signed division by power of 2 *dramatically* from this:
div:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 64
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
ret
to this:
div:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 5
shr %ECX, 26
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 6
ret
Note that the intel compiler is currently making this:
div:
movl 4(%esp), %edx #3.5
movl %edx, %eax #4.14
sarl $5, %eax #4.14
shrl $26, %eax #4.14
addl %edx, %eax #4.14
sarl $6, %eax #4.14
ret #4.14
Which has one less register->register copy. (hint hint alkis :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13354 91177308-0d34-0410-b5e6-96231b3b80d8