A simplification for checking whether the signs of the operands and sum differ. Thanks, Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60043 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 0a15715..4400fed 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -4187,21 +4187,20 @@
SDValue Zero = DAG.getConstant(0, LHS.getValueType());
- SDValue LHSPos = DAG.getSetCC(OType, LHS, Zero, ISD::SETGE);
- SDValue RHSPos = DAG.getSetCC(OType, RHS, Zero, ISD::SETGE);
- SDValue And1 = DAG.getNode(ISD::AND, OType, LHSPos, RHSPos);
+ // LHSSign -> LHS >= 0
+ // RHSSign -> RHS >= 0
+ // SumSign -> Sum >= 0
+ //
+ // Overflow -> (LHSSign == RHSSign) && (LHSSign != SumSign)
+ //
+ SDValue LHSSign = DAG.getSetCC(OType, LHS, Zero, ISD::SETGE);
+ SDValue RHSSign = DAG.getSetCC(OType, RHS, Zero, ISD::SETGE);
+ SDValue SignsEq = DAG.getSetCC(OType, LHSSign, RHSSign, ISD::SETEQ);
- And1 = DAG.getNode(ISD::AND, OType, And1,
- DAG.getSetCC(OType, Sum, Zero, ISD::SETLT));
+ SDValue SumSign = DAG.getSetCC(OType, Sum, Zero, ISD::SETGE);
+ SDValue SumSignNE = DAG.getSetCC(OType, LHSSign, SumSign, ISD::SETNE);
- SDValue LHSNeg = DAG.getSetCC(OType, LHS, Zero, ISD::SETLT);
- SDValue RHSNeg = DAG.getSetCC(OType, RHS, Zero, ISD::SETLT);
- SDValue And2 = DAG.getNode(ISD::AND, OType, LHSNeg, RHSNeg);
-
- And2 = DAG.getNode(ISD::AND, OType, And2,
- DAG.getSetCC(OType, Sum, Zero, ISD::SETGE));
-
- SDValue Cmp = DAG.getNode(ISD::OR, OType, And1, And2);
+ SDValue Cmp = DAG.getNode(ISD::AND, OType, SignsEq, SumSignNE);
MVT ValueVTs[] = { LHS.getValueType(), OType };
SDValue Ops[] = { Sum, Cmp };